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Jeyeong Park

Master candidate of CSDL, POSTECH in Korea

Languages

  • Korean (Native)
  • English (intermediate)

Interests

  • Electronic Design Automation
  • Machine learning

About Theme

Career Profile

Jeyeong Park received the B.S. degree in Electronics Engineering in 2025 from Kyungpook National University, Daegu, South Korea. He is currently the M.S. candidate in Graduate School of Semiconductor Technology in 2025 from Pohang University of Science and Technology(POSTECH), Pohang, South Korea. His current research interests include AI-based Electronic Design Automation. He is working with Prof. Seokhyeong Kang in CAD & SoC Design Lab.

Education

M.Sc in Graduate School of Semiconductor Technology

Feb 2025 - present
in CSDL, POSTECH (Pohang University of Science and Technology), Republic of Korea

Advisor: Prof. Seokhyeong Kang

B.Sc in Electronics Engineering

Mar 2018 - Feb 2025
Kyungpook National University, Daegu, South Korea

Experiences

Research Intern

Jul 2022 - Aug 2022
ETRI

Research Intern

Jan 2024 - Jan 2025
ICE, Kyungpook National University

Skills & Proficiency

C

Python

Verilog